Nanotechnology : Washington

Nanotechnology Lawyer & Attorney

NanoStaff — Sun, 23 Mar 2008 13:23:27 +0000

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Web url

http://www.nanolawreport.com/

Contact Email

jmonica@porterwright.com

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Street address

1919 Pennsylvania Avenue, NW, Suite 500

Zip or postal code

20006

Telephone

202-778-3000

Fax

202-778-3063

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NATO is sponsoring a multi-day nanoconference in Faro, Portugal on April 27-30, 2008 -- "Nanomaterials: Environmental Risks and Benefits and Emerging Consumer Products."

According to the conference website, the workshop has five primary purposes:

1. Identify and describe what is known about the risks and approaches to assess the safety and environmental risks of nanomaterials.

2. Outline environmental applications in the context of emerging consumer products, pollution prevention, risk reduction, and remediation.

3. Assess the suitability of multicriteria decision analysis for reconciliation of benefits and risks of nanotechnology.

4. Direct future research in nanomaterial and environmental sciences to address the emerging issues associated with nanotechnology in general and specifically with emerging nano-enabled consumer products.

5. Identify strategies for users in developing countries to best manage this emerging technology and its associated risks.

Conference sponsors include: NATO, Society for Risk Analysis (SRA), US Army Engineer Research and Development Center, International Copper Association, US Environmental Protection Agency, International Council on Nanotechnology, European Nanotechnology Trade Alliance, and Faculty from the University of Algarve.

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Flamel Technologies

NanoStaff — Wed, 19 Mar 2008 18:37:22 +0000

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Web url

http://www.flamel-technologies.fr/

Contact Email

mcwilliam@flamel.com

Short description

Street address

1825 K. Street - Suite 1210

Zip or postal code

20006

Telephone

+1 202 862 8400

Fax

+1 202 862 3933

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Ceo, president

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Flamel Technologies is a drug delivery company with expertise in polymer chemistry.

The company was founded in 1990.

In 1996, Flamel Technologies (FLML) became the second French biotech company to enter the Nasdaq.

The Company has assembled a strong team of researchers expert in polymer science and biochemistry, and owns a 50,000-square foot cGMP pharmaceutical production facility located in Pessac, France (with an annual production capacity of 2 billion tablets or capsules).

Flamel’s drug delivery platforms, Medusa® for therapeutic proteins and peptides, and Micropump® for small molecules , have been developed to improve the therapeutic characteristics, safety profile and ease of use of wide variety of drugs.

The Company is a recognized world leader in the innovation of delivery systems for small molecule and protein drugs, providing tailored solutions to the biotech and pharmaceutical industries for optimized controlled-release delivery of drugs. Flamel is turning already-marketed or new drugs into more effective and safer medicines for itself and for its partners.

Flamel has partnership agreements with major pharmaceutical companies.

The Company is actively seeking partnership agreements for the development and commercialization of products currently in its pipeline as well as for new products using Flamel’s proprietary delivery systems.

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Patents

SEMATECH to Reveal New Pathways for Advanced Transistor Scaling at IEDM

JohnT — Thu, 06 Dec 2007 11:11:24 +0000

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2007 IEEE International Electron Devices Meeting
SEMATECH’s continuing leadership in developing alternative transistor materials and processes for advanced semiconductors will be further demonstrated here next week at the 2007 IEEE International Electron Devices Meeting (IEDM).

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SEMATECH’s continuing leadership in developing alternative transistor materials and processes for advanced semiconductors will be further demonstrated here next week at the 2007 IEEE International Electron Devices Meeting (IEDM).

Engineers from SEMATECH’s Front End Processes (FEP) Division will present five technical papers on high-k metal gate stack and high-mobility channel materials during the prestigious annual conference, Dec. 10-12 in the Hilton Washington. SEMATECH also will host an invitational pre-conference workshop on technical and manufacturing challenges affecting the use of III-V materials in CMOS devices.

“Our presence at IEDM is a fitting climax to a year of solid progress in providing our members and the industry with new materials for transistor scaling,” said Raj Jammy, FEP director. “We’ve developed a high-k metal gate stack solutions that are process-driven, flexible, and open to external evaluation. We’ve also charted a course for the heterogeneous integration of advanced gate stack and high-mobility channel materials onto silicon. Our continuing leadership in materials is helping pave the way for 22nm feature technology and beyond.”

Supporting that goal will be SEMATECH’s workshop, “III-V CMOS on Si: Technical and Manufacturing Needs.” Co-sponsored by Aixtron AG, the workshop will include an opening talk by Robert Chau, Intel Senior Fellow and director of transistor research and nanotechnology in Intel’s Technology and Manufacturing Group. Other speakers will focus on topics leading to an early understanding of key issues in the large-scale manufacturing use of elements in columns III, IV and V of the periodic table.

At the subsequent IEDM conference, SEMATECH technologists will release new details on their cutting-edge metal gate technology. Another SEMATECH paper will provide new insights on application of flash-annealing to form ultra-shallow junctions with high-k metal gate devices and address associated defect issues.

Following is a summary of the SEMATECH papers’ session times, findings, titles, and lead authors:

* Session 3, at 2:25 p.m. Monday, Dec. 10: “Flexible, Simplified CMOS on Si(110) with Metal Gate/High-k for HP and LSTP” (Rusty Harris). High-k/metal gates on NMOS Si(110) demonstrate respectable output performance due to velocity saturation of electrons. As a result, Si(110) may provide significant performance improvement for HP and LSTP without the process complexity typical of mixed-orientation CMOS approaches.
* Session 13 at 9:55 a.m. Tuesday, Dec. 11: “Mechanism of Vfb Roll-off with High Workfunction Metal Gate and Low Temperature Oxygen Incorporation to Achieve PMOS Band Edge Workfunction” (S.C. Song). The phenomenon of flat-band voltage (Vfb) rolloff is successfully explained by progressive oxygen vacancy generation in high-k materials.
* Session 13 at 11:35 a.m. Tuesday: “Impact of Flash Annealing on Performance and Reliability of High-k/Metal-Gate MOSFETs for sub-45nm CMOS” (Pankaj Kalra). Flash annealing can be used to form ultra-shallow junctions to meet requirements for sub-45nmn CMOS technology, and with optimized post-metallization treatment is fully compatible with advanced gate stacks. This marks the first successful use of flash annealing on real devices, solving a number of process issues with proprietary data provided exclusively to SEMATECH members.
* Session 20 at 4:50 p.m. Tuesday: “Aggressively Scaled High-k Gate Dielectric with Excellent Performance and High Temperature Stability for 32nm and Beyond” (Prasanna Sivasubramani). SEMATECH engineers have successfully demonstrated the effectiveness of a higher-k gate material, hafnium-titanium-silicon-oxynitride (HfTiSiON), for the sub-32 nm technology generation. Reported for the first time, SEMATECH engineers were able to address the thermodynamic instability of TiO2-containing dielectrics.
* Session 28 at 11:35 a.m. Wednesday, Dec. 12: “Demonstration of High-Performance PMOSFETs Using Si/SxGe1-x/Si Quantum Wells with High-k Metal Gate Stacks and Uniaxial Strain Additivity for 22nm Technology and Beyond” (Sagar Suthram). In another first, SEMATECH engineers have demonstrated that strain-enhanced silicon-germanium (SiGe) and germanium-based channels show drive current improvements similar to silicon under strain. Experimental findings also indicate that PMOSFETs with strained quantum wells show good performance qualities comparable to silicon.

More information on FEP’s accomplishments this year can be found at these links:

* “SEMATECH Engineers Reveal Further Details of Trailblazing Work on Practical High-K Metal Gate Systems for 45nm And Beyond.” http://www.sematech.org/corporate/news/releases/20070820.htm.
* “SEMATECH Develops Dual Metal Gates for high-k CMOS Devices; Completes Quest with pMOS Breakthrough.” http://www.sematech.org/corporate/news/releases/20070126.htm.

For 20 years, SEMATECH® (www.sematech.org) has set global direction, enabled flexible collaboration, and bridged strategic R&D to manufacturing. Today, we continue accelerating the next technology revolution with our nanoelectronics and emerging technology partners.

Event precise location and contact information

SEMATECH, Austin
Dan McGowan, 512-356-3440
dan.mcgowan@sematech.org

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SHORT COURSE: Communicating Risk about Nanotechnology in the 21st Century

Thu, 15 Feb 2007 17:35:41 +0000

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INSTRUCTOR:Prof. David Berube, University of South Carolina

This course will examine some of the unique features of applied nanoscience and the research on communicating risk which is relevant to developing a communication algorithm for different audiences. The course rewrites risk management formulae to compensate for "new" media (internet based) and for some of the societal concerns expressed in public outreach including but not limited to environmental health and safety.

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Event precise location and contact information

Web site Url link

http://www.rarecor.com/nanotechnology_short_course_risk_communication_berube.shtml

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RARE Corporation

George Washington University: Wagner lab

Benj — Fri, 25 Aug 2006 14:25:19 +0100

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Web url

http://home.gwu.edu/~wagnerm/index.html

Contact Email

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Street address

2121 Eye Street, N.W.

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20052

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These materials can have vastly enhanced properties over their bulk counterparts because of their high surface area to volume ratio and quantum effects due to electronic confinement. In addition to our interest in their intrinsic properties, we also utilize them as precursors to metastable and nanostructured materials as well as components of composites.

Currently, we have three main project areas, all well supported by external funding, the synthesis of nanoscale materials by alkalide reduction, development of magnetic refrigerants for ambient temperature applications and the development of improved Li-ion battery electrode materials. Follow the links to the left to meet the members of the lab, learn about the projects, take a virtual tour of the labs and see pictures from some of the meetings/events we have attended.

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American Chemical Society (Acs)

Benj — Sun, 20 Aug 2006 15:57:21 +0100

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Web url

http://www.chemistry.org/

Contact Email

Short description

Street address

1155 Sixteenth Street, NW

Zip or postal code

20036

Telephone

800-227-5558 (Us), 202-872-4600 (Outside us)

Fax

202-776-8258

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The organization provides a broad range of opportunities for peer interaction and career development, regardless of professional or scientific interests. The programs and activities conducted by ACS today are the products of a tradition of excellence in meeting member needs that dates from the Society's founding in 1876.

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US Naval Research Lab: Nanoscience and technology

Benj — Fri, 18 Aug 2006 17:59:43 +0100

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Web url

http://www.nanosra.nrl.navy.mil/

Contact Email

Short description

Street address

US Naval Research Lab, Code 6100, 4555 Overlook Ave., S.W.

Zip or postal code

20375

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Recognized Applications of Nanoscience:

-Ultrasmall, highly parallel, computers with multi-teraflop speed
-Image information processors, e.g., extraction and recognition
-Low-power personal and autonomous communication and computation devices
-high-density information storage devices, e.g., terabit/cm2 nonvolatile memory
-Lasers and detectors for weapons and countermeasures
-Optical (infrared, visible, ultraviolet) sensors for improved surveillance and targeting
-Integrated sensor suites for chemical and biological agent detection
-Catalysts for enhancing and controlling energetic reactions
-Synthesis of new compounds (e.g., narrow-bandgap materials)
-Designer materials with combinations of properties that do not currently exist