Scientists build the first wafer-scale graphene integrated circuit smaller than a pinhead. Designed for wireless communications, this graphene-based analog integrated circuit could improve today’s wireless devices and points to the potential for a new set of applications.
IBM Research scientists said they have achieved a milestone in creating a building block for the future of wireless devices. In a paper published in the magazine Science, IBM researchers announced the first integrated circuit fabricated from wafer-size graphene, and demonstrated a broadband frequency mixer operating at frequencies up to 10 gigahertz (10 billion cycles/second).
Designed for wireless communications, this graphene-based analog integrated circuit could improve today’s wireless devices and points to the potential for a new set of applications. At today’s conventional frequencies, cell phone and transceiver signals could be improved, potentially allowing phones to work where they can’t today while, at much higher frequencies, military and medical personnel could see concealed weapons or conduct medical imaging without the same radiation dangers of X-rays.
Graphene, the thinnest electronic material consisting of a single layer of carbon atoms packed in a honeycomb structure, possesses outstanding electrical, optical, mechanical and thermal properties that could make it less expensive and use less energy inside portable electronics like smart phones.
Despite significant scientific progress in the understanding of this novel material and the demonstration of high-performance graphene-based devices, the challenge of integrating graphene transistors with other components on a single chip had not been realised until now, mostly due to poor adhesion of graphene with metals and oxides and the lack of reliable fabrication schemes to yield reproducible devices and circuits.
The new integrated circuit, consisting of a graphene transistor and a pair of inductors compactly integrated on a silicon carbide (SiC) wafer, overcomes the design hurdles by developing wafer-scale fabrication procedures that maintain the quality of graphene and, at the same time, allow for its integration to other components in a complex circuitry.